CTS-SAT-1-OBC-Firmware
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CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. More...
#include "stm32l4xx.h"
Macros | |
#define | HSE_VALUE 8000000U |
#define | MSI_VALUE 4000000U |
#define | HSI_VALUE 16000000U |
#define | USER_VECT_TAB_ADDRESS |
#define | VECT_TAB_BASE_ADDRESS FLASH_BASE |
#define | VECT_TAB_OFFSET 0x00000000U |
Functions | |
void | SystemInit (void) |
Setup the microcontroller system. | |
void | SystemCoreClockUpdate (void) |
Update SystemCoreClock variable according to Clock Register Values. The SystemCoreClock variable contains the core clock (HCLK), it can be used by the user application to setup the SysTick timer or configure other parameters. | |
Variables | |
uint32_t | SystemCoreClock = 4000000U |
const uint8_t | AHBPrescTable [16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U} |
const uint8_t | APBPrescTable [8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U} |
const uint32_t | MSIRangeTable [12] |
CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
This file provides two functions and one global variable to be called from user application:
After each device reset the MSI (4 MHz) is used as system clock source. Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to configure the system clock before to branch to main program.
Require 48MHz for USB OTG FS, | Disabled
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Copyright (c) 2017 STMicroelectronics. All rights reserved.
This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.